兄弟们上周说的故事转手绘视频skill,现在开源了。
支持把中文故事文案(或有序的本地图片)转换成手绘日记漫画动画——手写体字幕、从左到右的黑白→上色渐变揭示、可选的翻页转场、安全不裁剪的画面构图,输出静音 MP4 画面轨,方便后期配音。
功能特性
故事文本 → 分镜:保留原文措辞,默认一个完整句子一个节拍,只在自然叙事转折处拆分长复合句。
上传页面 → 动画:自动裁切合成页中的手写字幕与插画,并在本地生成对齐的黑白底版。
两种转场:直接切换(text → bw_full → color,从左到右揭示)与翻页(保留原始上传页,从右下角卷起)。
安全构图:所有插画内容保持在白色安全边框内,只使用 contained 构图,绝不 cover 裁剪。
静音 MP4 输出:H.264,正式版 1080×1440 / 预览版 720×960;配音与 BGM 属于后期工作。
开源地址👇
附上最新数据:
9天,14条视频 ,涨粉648, 播放量日均稳定上2.5W+ 这几天发的少一天1条,每天3条的话应该在10w左右 开通创作者权益后 不算爆款 应该每天最少能有大几块钱。
显示更多
chips get all the love but the interconnects across all levels from c2c to rack-to-rack are as important, and many chip makers are sleeping on it until very recently. Even most interconnects people just want it to be as transparent as possible, just send and receive the bits with lower error rates and lower energy per bit, wrong long-term direction imo. Interconnects are part of the living creature, so many things happening in your blood vessels in addition to just moving stuff, and your axons do much more than carrying spikes.
People do not appreciate interconnects, smaller volume, poor margin, messy ecosystem, manual process, it's been a spiral of grinding, and it is largely invisible. How often do you see people tearing down transceivers and die shot of DSP chips vs logic chips? How often do you see high res pictures of all the connector's gold fingers on the NVL72 cartridge? Because it sounds boring, it's just making contacts, shoving electrons and photons, what a simple problem.
But that is deceiving, and theres so much to it. You might want 576 to begin with, had to cut down to 288, then to 144, and finally to 72, and that barely worked first time. You are entering the domain of analog and mixed signaling, you are fighting copper real estate with power delivery, you are getting impedance mismatch and reflections and interference at every stupid interfaces, your optical components' and connectors' backreflection is making your laser mode hop.. And we are not even going into the thermal and strain-stress, the reliability of how many times you can actually mate your connector, the horrible jobs people are doing across the stack from science-project-originated photonic PDKs to hand cleaved laser dies to optical engines to rack manufacturing, on spec-ing out the requirements, the tolerances.. On top of all these, people thinking about where the bits should be going and people who know what the bits have to go thru are two totally different groups of people.
But it is shifting, pluggable volumes shipped are doubling and tripling for scale-out, scale-up domain asks for much higher bw than scale-out, and interconnects are inevitable even if you cram as much compute and memory onto a single wafer. People will see it always has been interconnects, the chips people have already been doing it on the chips, that you can sort it out with your chip designers and foundries, and now you need to work with more people to sort it out from chips to boards/trays to racks to pods to data halls and data centers. These people speak very different languages and care about very different things, and it will take a lot of effort to pull order out of all the chaos.
At the end of the day, it is such a crazy problem to work on, such a beautiful thing to make, millions of amps of current flipping 1e20 of flops, sextillions of photons carrying thousands of terabits per second, a few tons of copper, tens of thousands of fibers totally few hundred kilometers, one scale-up domain. You absolutely need a group of people that appreciate the beauty and care about the craft behind the grinding to make it together.
显示更多