Intel’s EMIB Packaging Is Growing Rapidly — Silicon Capacitors Are Taking Off Too
Silicon capacitors are poised for explosive growth in the AI semiconductor space. Intel has been found to be planning a large-scale adoption of silicon capacitors starting next year, in order to enhance the performance of its in-house 2.5D packaging technology, “EMIB.”
The most clearly visible source of demand is Google. Google plans to launch its next-generation AI accelerator, “v8e,” in the second half of next year, and has adopted an EMIB substrate with embedded silicon capacitors for that chip. With other Big Tech companies such as Amazon also currently applying EMIB, analysts say demand could increase sharply.
According to industry sources on the 27th, Intel plans to apply silicon capacitors to its 2.5D packaging starting next year.
Intel Adopts “Silicon Capacitors” for 2.5D Packaging… Google AI Chip Gets First Application
2.5D is an advanced packaging technology that inserts a thin-film interposer between the semiconductor and the substrate. Because it can connect circuits at higher density compared with conventional packaging that uses only a substrate, demand is rising in the AI and HPC fields.
To improve cost efficiency in 2.5D packaging, Intel devised its own technology called EMIB. Rather than using a broad, spread-out interposer, EMIB connects chip to chip using a small silicon bridge. Since bridges only need to be placed where chip-to-chip connections are required, chips can be arranged more flexibly and efficiently.
Recently, EMIB has been drawing attention as an alternative to TSMC, which had been leading the existing 2.5D packaging market. This is because TSMC’s 2.5D packaging capacity is suffering from a supply shortage amid the rapid development of the AI industry.
Indeed, global Big Tech player Google is also paying attention to EMIB. Google has decided to adopt EMIB for its in-house AI semiconductor “v8e,” which it plans to launch in the second half of next year. Under this structure, TSMC handles chip mass production, MediaTek handles design and manufacturing support, and Intel handles packaging.
However, there have been concerns that EMIB is gradually showing limitations in providing stable power supply for AI semiconductors, which consume large amounts of power. Accordingly, Intel plans to introduce new technologies such as silicon capacitors and through-silicon vias (TSV) to ensure stable packaging for the v8e.
A capacitor is a component that stores and releases electricity in an electronic circuit. In the case of silicon capacitors, their resistance (ESL/ESR) is more than 100 times lower than that of conventional multilayer ceramic capacitors (MLCC), minimizing the signal loss that occurs in high-performance semiconductors. They can also be designed in an ultra-thin structure based on a silicon wafer, enabling high-density integration.
A semiconductor industry official explained, “Because the voltage drop (the phenomenon of voltage decreasing) that occurs in the high-frequency region within AI chips is difficult to solve with MLCC, we understand that Intel is adopting silicon capacitors as a solution,” adding, “The relevant supply chain is now in place, and mass production is set to begin in earnest next year.”
EMIB-T Is Already on a Growth Trajectory — The Related Ecosystem and Market Are Expanding Together
Intel has also inserted TSVs, which serve as power-delivery channels, into the silicon bridge. The key point is that by using TSVs to shorten the power-delivery path between the substrate and the chip, Intel has improved power efficiency and signal integrity. Intel calls this “EMIB-T.”
The industry expects the EMIB-T and silicon capacitor markets to grow rapidly.
This is because Japan’s Ibiden — one of the major companies that mass-produces semiconductor substrates for EMIB-T — is aggressively pursuing capital investment.
Previously, Ibiden had planned to build its Kawashima (Gama) plant in Gifu Prefecture as a substrate plant for Intel CPUs. However, it postponed that schedule and decided in the first half of this year to officially convert the Gama plant into a mass-production line for EMIB-T substrates. The investment is 220 billion yen (about KRW 2.1 trillion).
In its recent earnings announcement, Ibiden stated, “Operation of the Gama plant will begin in 2027 and enter full-scale mass production in 2028,” adding, “EMIB-T substrate capacity is currently far short of demand. However, adding further capacity is quite difficult, so we are discussing options with our customers.”
A semiconductor industry official explained, “Ibiden’s EMIB-T-dedicated line is being built with most of the investment coming from customers such as Google, Amazon, and Intel,” adding, “This demonstrates that AI semiconductors based on EMIB-T will grow significantly going forward, and silicon capacitors are likely to expand alongside them.”
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Bug fixes shipping to Grok Build 0.2.7 (release notes will be available in the TUI)
• Wrap around on Up/Down in slash menu and history search
• Restore subagent UI and replay on session resume
• Fix Ctrl+Delete on windows
• Windows drag-and-drop screenshot images + Ctrl/Alt+V image input
• Add Windows-friendly alternatives for Ctrl+Enter / Ctrl+;
• Strip base64 str images from read_file tool calls & pass as multimodal vision tokens
• Share terminal backend, scheduler, monitor across subagent sessions
• Image pipeline improvements (fix truncation, min pixels)
• /login command to reauth from inside TUI
• Add /usage
• Handle Cmd+A in prompt to select all text in ghostty
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From Evercore ISI’s report:
NVDA’s claimed 35x TCO advantage does not resonate strongly with the average AI engineer, and there is a widespread perception that its 70%+ gross margins are excessive. There is a clear willingness to improve economics by using ASICs or “good enough” alternatives.
Some hyperscalers push back against NVDA’s 35x TCO advantage claim, arguing that the calculation does not account for power consumption around the chip, including cooling. The power component, including cooling, can account for 30–50% of total overhead costs.
No major issues have been observed at the hyperscaler level in the bring-up preparation for Rubin mass production.
Vera Rubin mass-production shipments are expected to be received by hyperscalers in 2Q26, while enterprise OEMs are expected to have access around September–October 2026.
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