Jukan @ICML (@jukan05)

Even Chinese companies are signing LTAs now lol RTRS: - China’s CXMT has signed a $3 billion LTA with Tencent. - CXMT is also in talks with other Chinese internet companies, including Alibaba Cloud, ByteDance, and Xiaomi. - As of Q1, CXMT’s DDR5 yields still lagged behind Western peers. - CXMT currently operates two 12-inch DRAM fabs in Hefei and one fab in Beijing, with total wafer capacity of around 300k wafers per month.

Having recently traded China A shares myself, my impression was that the market is far too easily moved, and even manipulated, by absurd rumors. At the time, I held a leading Chinese CCL stock. One day, a rumor circulated that Chinese securities regulators were investigating a fund for allegedly manipulating CCL related stocks. As a result, a stock that had been up nearly 7% intraday quickly gave back all its gains and fell back to around flat. But after local Chinese media looked into the matter, the rumor was found to be false. A shares are far too vulnerable to rumors. I no longer trade China A shares.

I’ve reached 150,000 followers. It’s honestly hard to put into words how much this means to me. At the same time, it can feel a bit overwhelming. In Chinese communities, some people refer to me as a KOL, and I often see my tweets being screenshotted and shared across WeChat groups in real time. “Jukan said this.” Sometimes even the shitposts I throw out as jokes end up being analyzed far more seriously than I ever intended.... That said, there’s no denying that I’ve received far more attention and support than I ever expected. I wouldn’t have made it this far without all of you. Thank you, sincerely.

Intel’s EMIB Packaging Is Growing Rapidly — Silicon Capacitors Are Taking Off Too Silicon capacitors are poised for explosive growth in the AI semiconductor space. Intel has been found to be planning a large-scale adoption of silicon capacitors starting next year, in order to enhance the performance of its in-house 2.5D packaging technology, “EMIB.” The most clearly visible source of demand is Google. Google plans to launch its next-generation AI accelerator, “v8e,” in the second half of next year, and has adopted an EMIB substrate with embedded silicon capacitors for that chip. With other Big Tech companies such as Amazon also currently applying EMIB, analysts say demand could increase sharply. According to industry sources on the 27th, Intel plans to apply silicon capacitors to its 2.5D packaging starting next year. Intel Adopts “Silicon Capacitors” for 2.5D Packaging… Google AI Chip Gets First Application 2.5D is an advanced packaging technology that inserts a thin-film interposer between the semiconductor and the substrate. Because it can connect circuits at higher density compared with conventional packaging that uses only a substrate, demand is rising in the AI and HPC fields. To improve cost efficiency in 2.5D packaging, Intel devised its own technology called EMIB. Rather than using a broad, spread-out interposer, EMIB connects chip to chip using a small silicon bridge. Since bridges only need to be placed where chip-to-chip connections are required, chips can be arranged more flexibly and efficiently. Recently, EMIB has been drawing attention as an alternative to TSMC, which had been leading the existing 2.5D packaging market. This is because TSMC’s 2.5D packaging capacity is suffering from a supply shortage amid the rapid development of the AI industry. Indeed, global Big Tech player Google is also paying attention to EMIB. Google has decided to adopt EMIB for its in-house AI semiconductor “v8e,” which it plans to launch in the second half of next year. Under this structure, TSMC handles chip mass production, MediaTek handles design and manufacturing support, and Intel handles packaging. However, there have been concerns that EMIB is gradually showing limitations in providing stable power supply for AI semiconductors, which consume large amounts of power. Accordingly, Intel plans to introduce new technologies such as silicon capacitors and through-silicon vias (TSV) to ensure stable packaging for the v8e. A capacitor is a component that stores and releases electricity in an electronic circuit. In the case of silicon capacitors, their resistance (ESL/ESR) is more than 100 times lower than that of conventional multilayer ceramic capacitors (MLCC), minimizing the signal loss that occurs in high-performance semiconductors. They can also be designed in an ultra-thin structure based on a silicon wafer, enabling high-density integration. A semiconductor industry official explained, “Because the voltage drop (the phenomenon of voltage decreasing) that occurs in the high-frequency region within AI chips is difficult to solve with MLCC, we understand that Intel is adopting silicon capacitors as a solution,” adding, “The relevant supply chain is now in place, and mass production is set to begin in earnest next year.” EMIB-T Is Already on a Growth Trajectory — The Related Ecosystem and Market Are Expanding Together Intel has also inserted TSVs, which serve as power-delivery channels, into the silicon bridge. The key point is that by using TSVs to shorten the power-delivery path between the substrate and the chip, Intel has improved power efficiency and signal integrity. Intel calls this “EMIB-T.” The industry expects the EMIB-T and silicon capacitor markets to grow rapidly. This is because Japan’s Ibiden — one of the major companies that mass-produces semiconductor substrates for EMIB-T — is aggressively pursuing capital investment. Previously, Ibiden had planned to build its Kawashima (Gama) plant in Gifu Prefecture as a substrate plant for Intel CPUs. However, it postponed that schedule and decided in the first half of this year to officially convert the Gama plant into a mass-production line for EMIB-T substrates. The investment is 220 billion yen (about KRW 2.1 trillion). In its recent earnings announcement, Ibiden stated, “Operation of the Gama plant will begin in 2027 and enter full-scale mass production in 2028,” adding, “EMIB-T substrate capacity is currently far short of demand. However, adding further capacity is quite difficult, so we are discussing options with our customers.” A semiconductor industry official explained, “Ibiden’s EMIB-T-dedicated line is being built with most of the investment coming from customers such as Google, Amazon, and Intel,” adding, “This demonstrates that AI semiconductors based on EMIB-T will grow significantly going forward, and silicon capacitors are likely to expand alongside them.”

As a Korean, this is very sad. According to a local Korean media report released today, LG Electronics has reportedly explored the possibility of selling its TV business to China’s Hisense. The Korean TV industry has collapsed.

From Evercore ISI’s report: NVDA’s claimed 35x TCO advantage does not resonate strongly with the average AI engineer, and there is a widespread perception that its 70%+ gross margins are excessive. There is a clear willingness to improve economics by using ASICs or “good enough” alternatives. Some hyperscalers push back against NVDA’s 35x TCO advantage claim, arguing that the calculation does not account for power consumption around the chip, including cooling. The power component, including cooling, can account for 30–50% of total overhead costs. No major issues have been observed at the hyperscaler level in the bring-up preparation for Rubin mass production. Vera Rubin mass-production shipments are expected to be received by hyperscalers in 2Q26, while enterprise OEMs are expected to have access around September–October 2026.

According to the website of the China Securities Regulatory Commission (CSRC), Yangtze Memory Holdings, the parent company of YMTC, has submitted a listing tutoring report in preparation for an IPO and stock market listing.

Samsung vs. SK Hynix: All-Out Push to Accelerate "Super Fast Track" Fab Expansion As the memory shortage persists, Samsung Electronics and SK Hynix — both racing to maximize profitability by ramping up output — have entered a head-to-head sprint over fab construction. Both companies are pulling out all the stops to pull forward their fab completion schedules, and the competition has spilled over into a scramble for certain construction materials. Industry observers note that with the memory supply shortage likely to be prolonged on the back of expanding AI infrastructure investment, both companies have effectively shifted into a "speed-war regime" to secure first-mover advantage in the market. With some construction materials running short of demand, companies that fail to lock in supply early are seeing their construction timelines slip — and the behind-the-scenes competition between the two memory giants is expected to intensify further. According to the semiconductor industry, Samsung Electronics and SK Hynix have recently been moving to compress their fab construction schedules. Both companies are cutting build times below their original plans in a push to expand memory capacity. Samsung is accelerating the buildout of its Pyeongtaek campus. P5 Fab 1 is currently under construction, and P6 (P5 Fab 2) is scheduled to break ground in July — meaning the two fabs will go vertical simultaneously. According to industry sources, Samsung is in discussions with Samsung C&T over various construction methods aimed at cutting the P5 Fab 1 build schedule by more than half versus the original plan. Samsung resumed full-scale construction last November, with completion initially expected in the second half of 2028. However, if the schedule compression materializes, the line could be brought online as early as 2027. Samsung C&T is the contractor for P5 Fab 1. One industry source said, "Samsung is currently pushing to roughly halve the construction timeline for P5 Fab 1," adding that "the construction site is now running a three-shift system, with overnight work and even Sunday operations underway." P5 Fab 2 has also entered speed-war mode. The industry expects steel column installation to begin around year-end, following a full-scale groundbreaking in July. Semiconductor fab construction typically begins with piling work — driving piles into the ground to lay the foundation — followed by the installation of anchor bolts to support the steel columns and a concrete curing process. If the schedule holds, column installation could begin by the end of this year. SK Hynix, not to be outdone, is accelerating construction at its Yongin semiconductor cluster. The company is currently in Phase 1 of frame construction at Fab 1 of the Yongin cluster, with a cleanroom opening targeted for February of next year. Fab 1 will consist of two frame structures and six cleanrooms, with cleanrooms to be built sequentially by phase. Phase 1 — which covers the first frame stage and one cleanroom — is currently underway, and Phase 2, the second frame stage of Fab 1, is scheduled to break ground in August. Previously, the industry had expected SK Hynix to begin Fab 2 construction only after completing the Fab 1 expansion. However, sources on the ground say scheduling work for Fab 2 construction has already largely been arranged. At the same time, SK Hynix is said to have pre-emptively built out its Phase 2 and Phase 4 teams to accelerate the Fab 1 cleanroom buildout. Another source on the ground commented, "SK Hynix is trying to push fab construction on a 'Super Fast Track' basis. The construction BIM team will be fully staffed through Phase 4 by July, and once those teams are in place, cleanroom construction is likely to ramp in earnest just two months later." As both companies race to expand capacity ahead of memory demand, competition for construction materials is reportedly heating up as well. On the ground, both Samsung and SK Hynix are sourcing some steel structural products from Sencore Tech, a specialist steel-structure maker. Sencore Tech applies a proprietary, patented method that enables construction time to be shortened in some of its products, and has previously supplied products for SK Hynix's Icheon M16 and Samsung's Pyeongtaek campus Office Building 3, among others. Samsung is reportedly applying Sencore Tech's PC girders to the complex building being built between P5 Fab 1 and P5 Fab 2. PC girders are precast concrete beams manufactured at the factory that horizontally connect columns. However, with Sencore Tech having signed a priority-supply agreement with SK Hynix, the production schedule for PC girders bound for Samsung is reportedly facing some delays. A source on the ground said, "Sencore Tech is understood to have a larger share of its supply allocated to SK Hynix. With Samsung now applying Sencore Tech's products to this complex building project, the two companies are effectively competing for the same construction materials." The aggressive speed war between the two companies is being driven by the deepening memory shortage. With AI infrastructure demand surging since last year and supply failing to keep pace, prices have been rising sharply — to the point that, in the market, memory has become a "name-your-price" commodity. Market researcher TrendForce projects that commodity DRAM and NAND contract prices will rise 63% and 75% quarter-on-quarter, respectively, in 2Q. The industry reads this as Samsung and SK Hynix racing to expand capacity in order to capture market leadership in a rapidly expanding AI memory market. Both companies recently outlined their fab construction plans on their 1Q earnings calls and signaled an intent to accelerate them. One industry source said, "In the AI semiconductor market, what matters most is how quickly and reliably you can deliver supply. Both companies are pushing to accelerate fab expansion in order to secure leadership in the AI memory market."

“A couple of customers have prepaid for substrates, because the substrate supply chain is very tight – so I need to put up the money to secure this material…(and it shows) the commitment to me – so that’s very exciting.” LFG Ibiden!!!

Kye-hyun Kyung, Samsung Electronics Senior Advisor: "Memory prices to fall in H2 next year… Korea must cultivate deep-tech manufacturing" Kye-hyun Kyung, Senior Advisor and former head of Samsung Electronics' Device Solutions (DS) Division, forecast that memory semiconductor prices will decline starting in the second half of next year, and urged Korean industry to prepare in advance. Delivering the keynote at the 285th NAEK Forum, hosted by the National Academy of Engineering of Korea (NAEK) at L-Tower in Seocho-gu, Seoul on the 18th, Advisor Kyung said, "Chinese players are aggressively expanding production capacity (CAPA)," adding that "as memory supply surges, the market could shift starting in the second half of next year or the first half of 2028." Citing global market research firms, Kyung projected that memory prices will fall from H2 next year, when global memory CAPA is expected to surge to 6 million wafers per month. "If Big Tech's return on capex deteriorates, there is a possibility that investment could be scaled back," he said, also warning that memory demand itself could contract from 2028 onwards. While Korean industry, led by Samsung Electronics and SK Hynix, is currently enjoying unprecedented growth by capturing Big Tech's memory demand, the former head of Samsung's semiconductor business argued that Korea must prepare in advance for the post-boom period. Advisor Kyung pointed out, "Korea holds nearly 70% share of the DRAM market, but only 1.5% of the fabless market, and unlike Taiwan, Korea lacks a full-stack semiconductor ecosystem that includes fabless." He went on to advise that "Korea must leap forward as a deep-tech-based manufacturing nation." The point is that Korea should independently build advanced technology capabilities—not only in memory but also in fabless-based system semiconductors and sovereign AI—and actively apply them to its existing strength in manufacturing. He added, "It is difficult for Korea to compete simultaneously with the U.S. and China in both hardware and software," and that "it is important for Korea to do what it does well, and to that end, we must seriously consider how to deploy AI."

UBS models 2026 TPU shipments at 4.13 million units in total, consisting of 3.68 million units from AVGO and 450,000 units from MTK. For 2027, UBS models total TPU shipments at 9.87 million units, consisting of 6.76 million units from AVGO and 3.11 million units from MTK. $AVGO

>> TrendForce: Expansion of high-end demand and preemptive inventory build-up in consumer channels could drive an MLCC price rebound • According to TrendForce’s latest research, strong AI chip demand is tightening supply-demand conditions for high-end MLCCs, while supply of consumer-grade MLCCs is also coming under pressure. As a result, some distributors have begun precautionary inventory build-up, and suppliers are responding with price hikes. • Recent price negotiations between ODMs and suppliers also show that the average decline in overall MLCC prices has reached its lowest level in the past three years. TrendForce analyzes this as evidence that the MLCC pricing cycle has entered a critical phase ahead of a potential rebound.

Interesting... I had previously modeled the DRAM capacity for CPU servers used in Agentic AI as being the same as that of general-purpose servers. However, according to recent industry surveys, CPU-dedicated servers typically use a dual-socket (2-socket) configuration as standard and have significantly higher DRAM requirements. As a result, the DDR5 capacity per server has increased 2 to 4 times compared to general-purpose servers with 1 to 2 sockets.

GF Overseas Electronics & Communications NVIDIA (NVDA Buy): Earnings Preview — Product Mix Offsets the Impact of Rubin Delay Reiterate Buy rating; target price modestly raised to $308: Driven by rising market expectations ahead of the upcoming earnings call and the U.S. approval on May 14 to export H200 chips to 10 Chinese companies, NVIDIA’s share price has reached a new all-time high. For the May 20 earnings call, we expect results to be in line with expectations, with guidance slightly above expectations. Given the company’s sizeable cash position and free cash flow, the announcement of a new share repurchase program during the earnings call would be a reasonable expectation. In addition, Rubin’s timeline remains a key market focus. We reiterate our view that mass production will be delayed by about one month to September, while the 2300W specification remains unchanged. Beyond GPUs, with Vera CPU and LPX, the company is expected to capture a larger share of value within the data center silicon TAM. For product re-rating, we still believe NVIDIA needs to launch an inference-focused GPU, potentially Feynman. Taking into account higher Blackwell shipments and ASPs, lower Rubin shipments, and LPX contribution, we adjust our FY27E/28E EPS forecasts by +0%/+13%, respectively, and modestly raise our target price from $292 to $308, based on 28x FY27E/28E P/E. Earnings preview — expected to be moderately positive: Driven by normal GB300 NVL72 production, approximately 10% QoQ growth in Blackwell shipments, and a small contribution from RTX6000, we now expect F1Q revenue of $80.6 billion, compared with Bloomberg consensus of $78.8 billion and buy-side expectations of $80.0 billion. As Blackwell shipments continue to increase, we expect F2Q guidance of $91.0 billion, or actual revenue of $93.0 billion, compared with Bloomberg consensus of $86.2 billion and buy-side expectations of around $90.0 billion. Our forecast does not include any Rubin contribution, as we believe it has already been delayed to mass production in September. Given the company’s sizeable cash position and free cash flow, its capital return plan is also worth watching. Blackwell, Vera, and LPX will offset the widely known impact of Rubin’s delay: According to our monthly report published on the 12th, due to earlier heatsink design changes, we expect Rubin’s timeline to be: QS in July, MP in September, and rack mass production in October. In terms of performance, we believe the redesigned version will still maintain the 2300W specification this year. On the other hand, LPX rack ramp-up is faster than expected. We still expect 16,000 LPX racks to ship from 4Q26 through 2027, contributing approximately $70 billion in revenue during this period. In addition, we believe NVIDIA may have shifted N3 wafer capacity from Rubin to Vera CPU in order to capture the Agentic AI trend. Overall, with deeper software–chip integration, the company is likely to capture a larger share of the data center silicon TAM. $NVDA

Why did xAI hand over a 220,000-GPU cluster to Anthropic? The technical backdrop to xAI's decision to hand Colossus 1 over to Anthropic in its entirety is more interesting than it appears. xAI deployed more than 220,000 NVIDIA GPUs at its Colossus 1 data center in Memphis. Of these, roughly 150,000 are estimated to be H100s, 50,000 H200s, and 20,000 GB200s. In other words, three different generations of silicon are mixed together inside a single cluster — a "heterogeneous architecture." For distributed training, however, this configuration is close to a disaster, according to engineers familiar with the setup. In distributed training, 100,000 GPUs must finish a single step simultaneously before the cluster can advance to the next one. Even if the GB200s finish their computation first, the remaining 99,999 chips have to wait for the slower H100s — or for any GPU that has hit a stack-related snag — to catch up. This is known as the straggler effect. The 11% GPU utilization rate (MFU: the share of theoretical FLOPs actually realized) at xAI recently reported by The Information can be read as the numerical fallout of this problem. It stands in stark contrast to the 40%-plus MFU figures achieved by Meta and Google. The problem runs deeper still. As discussed earlier, NVIDIA's NCCL has traditionally been optimized for a ring topology. It works beautifully at the 1,000–10,000 GPU scale, but once you push into the 100,000-unit range, the latency of data traversing the ring once around becomes punishingly long. GPUs need to churn through computations rapidly to keep MFU high, but while they sit waiting endlessly for data to arrive over the network fabric, more than half of the silicon falls into idle. Google sidestepped this bottleneck with its own custom topology (Google's OCS: Apollo/Palomar), but xAI, by my read, has not yet reached that stage. Layer Blackwell's (GB200) "power smoothing" issue on top, and the picture comes into focus. According to Zeeshan Patel, formerly in charge of multimodal pre-training at xAI, Blackwell GPUs draw power so aggressively that the chip itself includes a hardware feature for smoothing power delivery. xAI's existing software stack, however, was optimized for Hopper and does not understand the characteristics of the new hardware; when it imposes irregular loads on the chip, the silicon physically destructs — literally melts. That means the modeling stack must be rewritten from scratch, which in turn means scaling is far harder than most of us imagine. Pulling all of this together points to a single conclusion. xAI judged that training frontier models on Colossus 1 simply was not efficient enough to be worthwhile. It therefore moved its own training workloads wholesale onto Colossus 2, built as a 100% Blackwell homogeneous cluster. Colossus 1, on the other hand — whose mixed architecture is far less crippling for inference, which parallelizes more forgivingly — was leased in its entirety to an Anthropic that desperately needed inference capacity. Many observers point to what looks like a contradiction: Elon Musk poured enormous capital into building Colossus, only to hand the core asset over to a direct competitor in Anthropic. Others read it as xAI capitulating because it is a "middling frontier lab." But these are surface-level reads. Look at the numbers and a different picture emerges. xAI today holds roughly 550,000+ GPUs in total (on an H100-equivalent performance basis), and Colossus 1 (220,000 units) accounts for only about 40% of the total available capacity. Colossus 2 — built entirely on Blackwell — is already operational and continuing to expand. Elon kept the all-Blackwell homogeneous cluster (Colossus 2) for himself and leased out the older, mixed-generation Colossus 1. In other words, he handed the pain of rewriting the stack — the MFU-11% debacle — to Anthropic, while keeping his own focus on training the next generation of models. The real point, then, is this. Elon's objective appears to be positioning ahead of the SpaceXAI IPO at a $1.75 trillion valuation, currently floated for as early as June. The narrative SpaceXAI now needs is that xAI — long the "sore finger" — is not merely a research lab burning cash, but a business with a "neo-cloud" model in the mold of AWS, capable of leasing surplus assets at high yields. From a cost-of-capital perspective, an "AGI cash incinerator" is far less attractive to investors than a "data-center landlord generating cash." As noted above, the most important detail of the Colossus 1 lease is that it is for inference, not training. Unlike training, inference requires far less tightly synchronized inter-GPU communication. Even when the chips are heterogeneous, the workload parcels out cleanly across them in parallel. The straggler effect — the chief weakness of a mixed cluster — is essentially neutralized for inference workloads. Furthermore, with Anthropic occupying all 220,000 GPUs as a single tenant, the network-switch jitter (unanticipated latency) that arises under multi-tenancy disappears. The two sides' technical weaknesses end up complementing each other almost exactly. One insight follows. As a training cluster mixing H100/H200/GB200, Colossus 1 was an asset that could only deliver an MFU of 11%. The moment it was handed over to a single inference customer, however, that asset transformed into a cash-flow asset rented out at roughly $2.60 per GPU-hour (a weighted average of the lease rates across GPU types). For xAI, what was a "cluster from hell" for training has become a "golden goose" minting $5–6 billion in annual revenue when redeployed for inference. Elon's genius, I would argue, lies not in the model but in this asset-rotation structure. The weight of that $6 billion becomes clearer when set against xAI's income statement. Annualizing xAI's 1Q26 net loss yields roughly $6 billion in losses per year. The $5–6 billion in annual revenue generated by leasing Colossus 1 to Anthropic, in other words, almost perfectly hedges xAI's loss figure. This single deal effectively pulls xAI to break-even. Heading into the SpaceXAI IPO, this functions as a core line of financial defense. From a cost-of-capital standpoint, if the image shifts from "research lab burning cash" to "infrastructure tollgate stably printing $6 billion a year," the entire tone of the offering can change. (May 8, 2026, Mirae Asset Securities)